Listando Treballs finals de màster por autor/a "Estevadeordal Serra, Carles"
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Embedded and DSP design tools integration for Xilinx FPGA development
Estevadeordal Serra, Carles (2010)The aim of this projecte de final de master is to design a firmware with VHDL and the Matlab System Generator for Xilinx DSP of a test application, which mixes several of the Xilinx tools ...